The present invention relates to an integrated circuit having a timing circuit which has a connection for emitting an output signal whose time can be adjusted, and which has a switching time which is delayed with respect to a reference time, and to a method for adjustment of the output signal from the timing circuit.
Integrated circuits in which a number of digital signals are received and processed at comparatively high switching speeds require, since the specification is often very tight with regard to time, signal switching times whose timings are matched very precisely, for example between different functional groups in the integrated circuit. This can be controlled, for example, by using timing circuits or delay circuits (which are referred to as timing delay circuits), which have an output signal as a control signal which has a switching time delayed with respect to a reference time. Such timing circuits are used, for example, for what is referred to as auto-refresh for dynamic random access memory (DRAM) circuits, or for the constant precharging of differential amplifiers. In this case, it is particularly desirable for the operation of the timing circuits and their output signals to be as independent as possible of process fluctuations during the production of the integrated circuit. A largely standard method of operation and functionality of a number of timing circuits in the integrated circuit or in different integrated circuits can thus be achieved.
In order to match a timing circuit in an integrated circuit to the given requirements as well as possible and in order to make it possible to compensate for process fluctuations that occur during production, a circuit part of a timing circuit, for example a power source, is, for example, adjustable within a specific range. During the adjustment of such circuit parts, influences of the operating voltage of the integrated circuit, process fluctuations and temperature fluctuations must, in particular, be taken into account. During the course of production of the integrated circuit, the respective circuit part of a timing circuit can be set, and hence matched, on its own. This is done, for example, by varying a reference value in a suitable manner so as to compensate, for example, for the influence of process fluctuations in a specific manner.
Such an indirect adjustment process for the switching time of the output signal from a timing circuit, which is also referred to as trimming, and is normally carried out by an external test set, is generally difficult and is subject to inaccuracies. Normally, this involves a relatively high level of instrumentation complexity. Furthermore, such an adjustment process can normally not be carried out via external connections for all the envisaged timing circuits in the integrated circuit.
It is accordingly an object of the invention to provide an integrated circuit having a timing circuit, and a method for adjustment of an output signal from the timing circuit which overcome the above-mentioned disadvantages of the prior art devices and methods of this general type, in which the method of operation and the functionality of the timing circuit can be adjusted as independently as possible of process fluctuations and other production-dependent influences.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated circuit. The integrated circuit contains a timing circuit having a connection for emitting an output signal whose time can be adjusted and the output signal has a switching time which is delayed with respect to a reference time. A drive circuit is connected to the timing circuit for assessing and adjusting the output signal from the timing circuit with regard to the switching time. The drive circuit has a connection connected to the timing circuit for outputting a control signal for adjusting the output signal with regard to the switching time. The timing circuit has an adjustable power source connected to the connection for the control signal. The timing circuit has a capacitance connected to and able to be charged and discharged through the adjustable power source. The output signal from the timing circuit is adjustable on a basis of a potential applied to the capacitance. The connection for the output signal of the timing circuit is connected to the drive circuit for assessing the output signal with regard to the switching time and with respect to the reference time.
Thus, according to the invention, the output signal from the timing circuit can be adjusted by the drive circuit such that the switching time of the output signal has a desired time delay with respect to a reference time. This allows the switching time to be influenced directly. The method of operation and functionality of the timing circuit can thus be adjusted largely independently of process fluctuations and other production-dependent influences.
This furthermore makes relatively simple handling and measurement possible, since the measurement, assessment and adjustment of the switching time of the output signal from the timing circuit can be carried out by the drive circuit. In consequence, no external test equipment is required. Since, when carrying out such a measurement, the corresponding switching flanks need not be measured or analyzed directly by an external test system, this results in higher measurement accuracy. Since the measurement is carried out directly on the chip of the integrated circuit, the measurement accuracy is not constrained by a tolerance of the external test system or of the entire test configuration.
In principle, the method can be used with a number of types of timing circuits that have an output signal whose time can be adjusted. The timing circuit has an adjustable power source which is connected to the connection for the control signal for the drive circuit, and a capacitance which can be charged or discharged through the power source. The switching time of the output signal is thus adjusted by suitable adjustment of the power source. In this case, the power source is adjusted in such a manner that the output signal has the desired switching time.
Adjustment can be carried out on the basis of a potential that is applied to the capacitance. The potential on the capacitance is in this case variable and depends on the current from the power source. For example, the capacitance is discharged from a charged state through the power source, so that the potential on the capacitance falls. It is likewise possible for the capacitance to be charged from the power source, so that the potential that is applied to the capacitance rises. The switching time of the output signal from the timing circuit can be derived from the potential profile on the capacitance.
In one development of the invention, the timing circuit has a comparison circuit for comparison of a reference potential with the potential that is applied to the capacitance. One output of the comparison circuit is in this case connected to the connection for the output signal from the timing circuit. If, for example, the capacitance is discharged through the power source, then the potential that is applied to the capacitance falls from an initial charge potential. If the value falls below the value of the reference potential in this process, then a corresponding signal is produced at the output of the comparison circuit. The signal has, for example, a switching flank from a low potential level to a high potential level. The switching flank in this case occurs at a time in which the potential that is applied to the capacitance is below the reference potential. The signal produced by the comparison circuit may be used as the output signal from the timing circuit.
During normal operation, for example, the timing circuit is used as what is referred to as a timing delay circuit. The timing circuit can be used, for example, to control the timing of what is referred to as autorefresh for a DRAM memory. However, it is also possible to use the timing circuit as a measurement circuit or as a reference circuit for other timing circuits on the chip of the integrated circuit. The timing circuit which is used as a measurement circuit is advantageously provided in an area of the chip which is not required for other functional groups of the chip.
In this case, the integrated circuit according to the invention has further timing circuits, each having a capacitance which can be charged or discharged. Furthermore, each of the further timing circuits has a connection which is connected via at least one current mirror circuit to the power source of the timing circuit. In consequence, the further timing circuits do not require their own adjustable power source. The timing circuit according to the invention is adjusted by suitable adjustment of its power source in the desired manner. The current which is sent via the power source is reflected onto the other timing circuits, so that they are likewise adjusted without any need to carry out an adjustment process on them themselves. The current from the power source can thus be distributed in a suitable manner over the semiconductor chip, and supplied to the respective time circuits.
If the timing circuit according to the invention is used as a measurement circuit, then its capacitance is preferably configured such that it reflects the relevant types of (parasitic) capacitances in the other timing circuits, for example gate capacitances, line capacitances and so on. The use of parasitic capacitances in the other timing circuits advantageously results in that there is no need to provide specific capacitances there.
In one advantageous refinement of the integrated circuit according to the invention, the output signal from the timing circuit can be adjusted by the drive circuit on the basis of a reference value. The integrated circuit then preferably has a memory unit for storing the reference value. In consequence, the reference value need be set only once, for example during a test mode, and is stored in the memory unit during normal operation. The memory unit then, for example, has programmable elements in the form of what are referred to as laser fuses or electrically programmable fuses. The laser fuses are programmed by what is referred to as a laser cutter in order to adjust and/or store the reference value.
In one development of the invention, the integrated circuit has a self-test unit, by which respectively following states of the output signal from the timing circuit can be analyzed. The self-test unit is also used for step-by-step adjustment of the output signal from the timing circuit by the drive circuit, on the basis of an analysis result. In consequence, the self-test unit allows completely autonomous trimming of the timing circuit. The self test unit is in this case based on the principle of a xe2x80x9cBuilt-In-xe2x80x9d (BIST). The test time for a number of timing circuits to be tested can in this way be considerably reduced. A number of drive circuits can be trimmed in parallel.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for adjusting an output signal from a timing circuit of an integrated circuit. The method includes the steps of:
initializing the timing circuit at a start of an adjustment process by a drive circuit connected to the timing circuit;
subsequently measuring the output signal and assessing the output signal with regard to a switching time of the output signal;
and adjusting the output signal on a basis of an assessment with regard to the switching time by a control signal output from the drive circuit and received by the timing circuit.
The timing circuit can be trimmed in various ways, depending on the required measurement accuracy. In one refinement of the method according to the invention, the drive circuit is connected to a connection for a clock signal. The output signal from the timing circuit is assessed by the drive circuit on the basis of the clock signal, by determining a number of clock periods before the occurrence of the switching time. The number of clock periods can then be assessed, for example using a value table, with a suitable reference value for adjustment of the power source being derived from this.
In another refinement of the method according to the invention, the output signal from the timing circuit is assessed by the drive circuit on the basis of the clock signal by determining whether the switching time of the output signal has occurred by the end of a clock period. If, for example, the switching time has not occurred within the clock period, then the reference value for controlling the power source is changed, so that the current from the power source is, for example, increased. This step is repeated until the switching time occurs within a clock period. The current from the power source can then be reduced in a next step to allow the switching time of the output signal to be accurately adjusted iteratively.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated circuit having a timing circuit, and a method for adjustment of an output signal from the timing circuit, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.